HDI PCB with stacked microvias and fine-pitch BGA from an HDI PCB manufacturer

HDI PCB Manufacturing

HDI PCB Manufacturer Up to 7-Step Sequential Build

Stacked microvias. Via-in-pad. 3/3mil trace. The routing density you need for next-gen silicon.

At a Glance

7+N+7
Max Build-Up
30
Max Layers
0.1mm
Min Via
8 days
Prototype

HDI Capabilities

From First HDI to Any-Layer

We match your design complexity to the right factory and process.

1-Step (1+N+1)

One laser drill layer per side. Your entry point into HDI: breakout 0.65mm BGA, reduce layer count, enable via-in-pad. 4-30 layers.

2-Step (2+N+2)

Two sequential laminations. Staggered or stacked microvias. For 0.5mm pitch BGA and dense multi-chip modules. 6-30 layers.

3-Step (3+N+3)

Three buildup layers per side. Stacked copper-filled vias. For 0.4mm pitch and maximum via density. 8-30 layers.

4-Step (4+N+4)

Any-layer interconnect capability. Every layer connects to every other through stacked via towers. For the densest designs in mobile and compute. 10-30 layers.

5-Step (5+N+5)

Five sequential laminations per side. For advanced SiP modules, AI accelerator substrates, and ultra-dense server boards requiring maximum channel density. 12-30 layers.

6-Step (6+N+6) & 7-Step (7+N+7)

The highest density we offer. Six or seven buildup layers per side for next-generation mobile AP substrates, HBM interposers, and designs where every micron counts. 14-30 layers.

Via Technology

Via Fill & Microvia Technologies

As an HDI PCB manufacturer, we treat the via as the real density driver in high density interconnect (HDI) designs. Every buildup layer on our HDI circuit boards pairs laser-drilled microvias with the right fill and cap strategy — across 4-30 layers and 1-7 step sequential lamination.

Stacked & Staggered Microvias

A laser-drilled microvia connects one layer to the next. Stacked microvias sit directly on top of each other to form via towers for via-in-pad under fine-pitch BGA; staggered microvias offset each hop to relax aspect ratio and cost. Copper-filled and planarized on every buildup layer.

Capped Vias (Via-in-Pad)

Capped vias are copper-filled, plated over, and planarized flat so we can place via-in-pad directly under BGA balls without solder wicking or voiding — the foundation of dense HDI escape routing.

Blind & Buried Vias

A blind via reaches from an outer layer to an inner layer; a buried via connects inner layers only and is invisible from the surface. Both free up outer-layer real estate for routing on dense stackups.

Resin Filled Vias

Resin filled vias plug through-holes and larger vias for a flat, cappable surface ready for plating over. We match fill chemistry to your stackup, and because resin Dk/Df differs from copper we account for it on impedance-controlled and RF layers.

Manufacturing Process

HDI PCB Manufacturing Process

Sequential Lamination Step by Step

Every HDI board starts as a standard multilayer core. We fabricate inner layers using conventional processes — cleaning copper-clad laminate, applying dry film photoresist, exposing with LDI (laser direct imaging) at 10μm registration accuracy, developing, etching, and stripping. The finished core goes through AOI to catch opens and shorts before it becomes buried inside the final stackup. This core is your N in the 1+N+1 notation — and getting it right is non-negotiable because you cannot rework an inner layer once laminated.

The first buildup layer begins with prepreg layup. We place one or two sheets of 1080 or 2116 prepreg (depending on your target dielectric thickness) on each side of the core, topped with copper foil — typically 12μm or 18μm depending on final trace width requirements. The stack enters our vacuum lamination press: 180°C peak temperature, 300 PSI pressure, held for 60 minutes under full vacuum to eliminate air traps. The resin flows, fills any inner-layer copper topography, and cross-links into a solid dielectric. After cool-down, we have a rigid panel with fresh copper surfaces ready for laser drilling.

Laser drilling is where HDI separates from standard multilayer. We run two laser systems depending on via size and material. For standard 100μm microvias through one dielectric layer, our CO2 laser fires at 9.4μm wavelength — fast and cost-effective at 3000-5000 holes per second. For tighter geometries below 100μm, or when drilling through copper foil without a conformal mask opening, we switch to UV Nd:YAG at 355nm wavelength. The UV laser ablates copper directly and produces cleaner via sidewalls with less taper. Our standard production aperture is 75μm at the top of the via, tapering to approximately 50μm at the bottom — giving an aspect ratio below 1:1 for reliable plating.

After laser drilling, every via must be cleaned. The desmear process removes carbonized resin and glass fiber debris left by the laser. We run a three-stage wet chemical desmear: sweller to soften resin, permanganate to oxidize organic residue, and neutralizer to remove manganese dioxide. For advanced builds where we need aggressive cleaning without attacking thin dielectrics, we use plasma desmear (CF4/O2 gas mixture) instead. Clean via bottoms are critical — any residue creates a weak copper-to-copper bond that fails under thermal stress.

Electroless copper deposition follows desmear. This chemical process deposits a thin seed layer of copper (0.3-0.5μm) on all exposed surfaces, including the via barrel walls. The seed layer must be continuous and adherent — it provides the conductive path for the subsequent electrolytic plating step. We control bath chemistry (copper sulfate concentration, formaldehyde reducer, EDTA complexor, pH) within tight windows to maintain deposition rate and adhesion quality.

Pattern plating builds up copper to target thickness. We apply dry film photoresist, image the circuit pattern, and develop. Then electrolytic copper plating fills the vias and builds trace copper simultaneously. For HDI microvias, we target 18-25μm copper thickness in the via barrel, with fill chemistry that deposits faster at the bottom of the via than at the surface — creating a bottom-up fill profile. This is critical for stacked vias: the via must be filled completely with copper (no dimple greater than 5μm) so the next via layer above can land on a solid copper target.

Planarization finishes the first buildup layer. After plating, filled vias have a slight copper bump above the surface. We run the panel through a belt sander or surface grinder to bring everything flat — coplanar within 3μm. Without planarization, the next prepreg layer traps air pockets over via bumps, creating voids that become reliability defects. A flat, uniform surface is what allows stacking: the next via drills directly into solid copper from the layer below.

For each additional buildup step, we repeat the entire sequence: prepreg layup, vacuum lamination at 180°C/300 PSI/60 min, laser drilling, desmear, electroless seed, pattern plate with copper fill, and planarize. A 2-step HDI board goes through this cycle twice per side. A 4-step board goes through it four times. Each repetition adds 2-3 production days and accumulates registration tolerance, which is why we hold layer-to-layer registration to ±25μm on HDI builds versus ±50μm on standard multilayer.

The final outer layer completes the board. We image outer layer traces using LDI, develop, and etch to form the circuit pattern. Solder mask application, legend printing, surface finish (ENIG, OSP, or immersion silver), and routing/scoring follow standard multilayer processes. The difference is that by this point, your 6-layer 2-step HDI board has been through the lamination press three separate times — once for the core and once for each buildup layer. Every press cycle must be controlled precisely because accumulated thermal stress can cause delamination between layers if cure profiles drift.

The Difference

Why HDI at AtlasPCB

HDI Done Right

The challenge with HDI isn't whether it can be made — it's whether the microvias will survive thermal cycling. Our factory qualification process ensures long-term reliability.

Dedicated HDI Factories

Your HDI board goes to a factory that does HDI every day — not a standard multilayer shop with a laser drill collecting dust.

Stacked Via Expertise

Copper-filled stacked microvias with planarization. Via-in-pad directly under BGA balls without voiding risk.

Stackup Engineering

We verify your via structure feasibility, aspect ratios, and capture pad sizes before production. No surprises.

Microvia Reliability

Process controls for via fill quality, barrel cracking prevention, and thermal cycling reliability. IST testing available.

Applications

Where HDI Makes the Difference

Density Where It Matters

HDI pays for itself when it eliminates layers, shrinks board area, or enables a package that wouldn't route on standard multilayer.

Mobile & Wearables

Smartphones, smartwatches, AR glasses — where every 0.1mm of board area matters.

High-Performance Computing

Server CPUs, AI accelerators, FPGA substrates with 0.4mm BGA at 2000+ pins.

Automotive ADAS

Sensor fusion processors, camera modules, lidar control boards in compact housings.

Medical Implants

Miniaturized electronics for hearing aids, neural stimulators, and diagnostic capsules.

FAQ

HDI Questions

Staggered vs stacked microvias?

Staggered: each via offsets from the one below — cheaper, uses more area. Stacked: vias aligned vertically, copper-filled — required for via-in-pad under BGA. Choose stacked when density demands it.

How do I know if I need HDI?

If your BGA pitch is ≤0.65mm, if you need via-in-pad, or if standard routing requires 12+ layers that HDI could do in 8. Upload your design — we will tell you if HDI is necessary or overkill.

What is the lead time?

1-step: 8 days prototype. 2-step: 10-11 days. 3-step: 13-14 days. 4-step: 16-17 days. 5-step: 19-20 days. 6-step: 22-23 days. 7-step: 25-26 days.

What is the minimum via diameter for HDI?

75μm laser-drilled is our standard production minimum for microvias. 100μm is the typical diameter for standard HDI builds where reliability margin is prioritized over density. For advanced substrate-like builds (SiP interposers, HBM fan-out), we go down to 50μm with UV laser and tighter process windows — though this requires design-for-manufacturing review to confirm aspect ratios and pad capture.

Can you mix HDI and standard through-hole in one board?

Yes, and most HDI designs are actually hybrid builds. The core section uses mechanical drilling for through-hole vias (power, ground, low-density signals), while the buildup layers use laser drilling for microvias (BGA escape, high-density routing). This is the most cost-effective approach — you get HDI density where you need it without paying for laser drilling on vias that could be standard through-holes.

What materials do you use for HDI buildup layers?

Standard builds: FR-4 prepreg in 1080 (2.8mil cured) or 2116 (4.6mil cured) glass styles — proven, cost-effective, and compatible with lead-free reflow. High-speed builds: Panasonic Megtron 6 R-5775 prepreg for low-loss buildup layers (Df 0.004 at 10GHz). High-Tg builds: Isola 370HR for lead-free assembly reliability with 180°C Tg. We match material to your Dk/Df requirements and thermal profile.

Need HDI?

Upload your design. We'll confirm if HDI is the right approach and which step count you actually need.