mSAP Process Gains Traction Beyond Smartphones

mSAP Process Gains Traction Beyond Smartphones: PCB Industry Adoption Expands to Automotive and AI Hardware

For nearly a decade, the modified Semi-Additive Process (mSAP) has been synonymous with one application: the mainboard inside premium smartphones. Apple’s iPhone, Samsung’s Galaxy S and Note series, and a handful of other flagship devices account for the vast majority of mSAP PCB production worldwide. The process enables the ultra-fine traces — line/space of <30μm/30μm — that make it possible to route thousands of signals in the confined space of a smartphone mainboard.

In 2026, that exclusivity is ending. Multiple PCB manufacturers have announced dedicated mSAP production capacity for automotive Advanced Driver Assistance Systems (ADAS) and AI server hardware, signaling a fundamental shift in how and where this technology is deployed. The implications for the broader PCB industry — including designers, fabricators, and supply chain planners — are significant.

Understanding mSAP: Why It Matters

To appreciate why mSAP’s expansion is newsworthy, it helps to understand what the process does differently from conventional PCB manufacturing.

Conventional Subtractive Etching

Traditional PCB manufacturing starts with a copper-clad laminate — a dielectric core with copper foil bonded to both sides, typically 12–35μm thick. The desired circuit pattern is defined by photoresist, and then the unwanted copper is etched away (subtracted) using chemical etchants.

The fundamental limitation of subtractive etching is undercut. As the etchant dissolves copper downward through the foil thickness, it also dissolves copper laterally beneath the photoresist. For a 18μm copper foil, the lateral undercut on each side is typically 8–12μm, which means the minimum practical trace width is approximately 50μm (2mil) and minimum space is similar.

This resolution has served the industry well for decades, but it’s increasingly insufficient for applications that demand higher routing density.

The mSAP Difference

mSAP inverts the process logic. Instead of starting with thick copper and removing what you don’t want, mSAP starts with an ultra-thin copper seed layer (typically 2–3μm) and builds up only the copper you do want:

1. Thin seed layer lamination. An ultra-thin copper foil (2–3μm) is laminated onto the dielectric layer
2. Photoresist application and patterning. A dry film photoresist is applied and exposed using [Laser Direct Imaging (LDI)]/blog/pcb-laser-direct-imaging-ldi/) for sub-10μm resolution
3. Electrolytic copper plating. Copper is plated up through the photoresist openings to the desired trace thickness (typically 12–15μm)
4. Resist stripping and seed layer etch. The photoresist is removed, and then the thin seed layer between traces is quickly etched away

Because only 2–3μm of copper needs to be etched (vs. 18–35μm in subtractive), the lateral undercut is minimal — typically <2μm per side. This enables line/space geometries of <30μm/30μm with excellent dimensional consistency, as detailed in [etch compensation design principles]/blog/pcb-etch-compensation-design/).

Current State: Smartphone Dominance

As of early 2026, the mSAP market is overwhelmingly concentrated in smartphone applications:

Total global mSAP PCB production is estimated at approximately $4.5 billion in 2025, with projections reaching $7.2 billion by 2028 — a CAGR of approximately 17%. Critically, non-smartphone applications are expected to grow at 35%+ CAGR, far outpacing the smartphone segment.

The Automotive Expansion: ADAS Driving Demand

Why ADAS Modules Need mSAP

Advanced Driver Assistance Systems represent one of the most demanding PCB applications in automotive electronics. Modern ADAS modules — particularly those processing data from radar, lidar, and camera arrays — must combine:

• High-speed digital processing (multi-gigabit data buses)
• RF front-end circuitry (77 GHz radar transceivers)
• Power management (multiple voltage rails with tight regulation)
• Reliability requirements (AEC-Q100, -40°C to +125°C operation)

All of this in a package constrained by the vehicle’s physical envelope. The radar processing ECU behind a bumper fascia might have maximum dimensions of 80mm × 60mm — yet must accommodate a high-performance SoC with 600+ I/O, RF circuitry, memory interfaces, and power management.

With conventional subtractive etching (50μm L/S), fitting all of this requires 10–12 PCB layers. With mSAP at 30μm L/S, the same routing can be accomplished in 6–8 layers — saving 2–4 layers. For an automotive module produced in volumes of millions per year, eliminating even two layers represents significant cost savings, improved reliability (fewer lamination cycles), and thinner board cross-sections that improve thermal management.

Who’s Building Automotive mSAP

Several major PCB manufacturers have announced or are ramping automotive mSAP capabilities:

• Unimicron (Taiwan) — dedicated automotive mSAP line operational since Q4 2025, targeting ADAS and EV battery management systems
• AT&S (Austria) — Chongqing, China facility includes mSAP capacity for European automotive OEMs, with IATF 16949 certification
• Zhen Ding Technology (Taiwan/China) — expanding mSAP from its iPhone production base into automotive, leveraging existing process expertise
• Samsung Electro-Mechanics (South Korea) — automotive mSAP line for Korean automotive OEM supply chain

The automotive qualification process (PPAP, IATF 16949, AEC-Q validation) adds 12–18 months to the production timeline, meaning boards in development now will reach vehicle production in 2027–2028 model years.

AI Server Hardware: Routing Density for Next-Generation Computing

The HBM Interface Challenge

AI accelerator hardware — the GPUs and custom ASICs powering data center training and inference — presents a different but equally compelling case for mSAP adoption.

Modern AI accelerators use High Bandwidth Memory (HBM) — stacked DRAM connected to the processor via a silicon interposer or advanced packaging substrate. Each HBM stack has 1,024 data lines at the package level, and a typical GPU may connect to 6–8 HBM stacks.

The PCB underneath this assembly must provide power delivery and signal routing for the interposer/package, connect to DDR5 memory channels, provide PCIe Gen 5/6 connectivity, and route high-speed network interfaces (400G/800G Ethernet).

The routing density required for these boards, particularly in the region immediately surrounding the GPU package, pushes beyond what subtractive etching can achieve reliably. mSAP enables 30–40μm L/S in the critical fan-out region, allowing designers to escape-route from dense BGA patterns without adding layers.

For detailed guidance on HDI stackup strategies that complement mSAP routing density, see our [advanced HDI stackup design guide]/blog/hdi-pcb-stackup-design-advanced/).

Design Considerations for AI Server mSAP

AI server boards using mSAP present unique challenges compared to smartphone applications:

• Larger panel sizes. Smartphone mainboards are small (typically 30mm × 100mm), while AI server boards can exceed 300mm × 400mm. Maintaining <30μm features across this area requires exceptional process uniformity
• Mixed technology. mSAP may be needed only in specific board regions (near the GPU), while other regions use conventional subtractive etching. This “hybrid” approach requires careful process engineering at the transition boundaries
• Thicker copper requirements. Power delivery planes in AI servers may require 2oz+ copper, while mSAP signal layers use 12–15μm traces. Managing this range within a single stackup demands sophisticated [PCB manufacturing process control]/blog/pcb-manufacturing-process/)
• Ultra-low-loss materials. AI server boards require Megtron 6/7 or equivalent ultra-low-loss laminates, which behave differently in the mSAP plating process compared to the standard materials used in smartphone applications

Cost and Capability Trade-offs

mSAP vs. Subtractive: The Economics

mSAP carries a cost premium over conventional subtractive etching:

However, the cost comparison must account for layer reduction. If mSAP enables a 6-layer board instead of an 8-layer subtractive board, the total board cost may actually decrease despite the per-layer premium — fewer layers mean fewer lamination cycles, fewer drill operations, and less material.

The break-even point depends on:

• Board size and complexity
• Required line/space
• Production volume (mSAP yield improves with volume)
• Layer count differential

For routing densities above approximately 2,500 cm of trace per cm² of board area, mSAP typically becomes cost-competitive with subtractive etching when accounting for layer reduction.

When to Consider mSAP

Designers should evaluate mSAP when:

1. BGA escape requires <50μm traces. If your BGA pitch is ≤0.5mm and requires trace routing between pads, mSAP provides the resolution needed. See our [HDI PCB design guide]/blog/hdi-pcb-design-guide/) for detailed escape routing analysis.
2. Layer count must be minimized. For applications where board thickness, weight, or reliability (fewer lamination cycles) are constrained.
3. Mixed fine-pitch and standard routing coexist. Hybrid mSAP/subtractive builds can optimize cost by using mSAP only where needed.
4. Production volumes justify the investment. mSAP yields improve significantly above 10,000 panels/month, making the economics favorable for high-volume applications.

Industry Outlook: 2026–2028

The expansion of mSAP beyond smartphones represents a maturation of the technology from a niche, application-specific process to a mainstream manufacturing capability. Key trends to watch:

• Equipment availability. High-resolution LDI systems, ultra-thin copper foil, and precision plating lines are the bottleneck. Equipment suppliers (Orbotech/KLA, SCREEN, Manz) are increasing capacity, but lead times for new lines remain 12–18 months.
• Standards development. IPC is developing acceptance criteria specific to mSAP-processed boards, addressing concerns around seed layer residue, trace profile tolerances, and adhesion to thin dielectrics.
• Geographic expansion. While mSAP production is currently concentrated in Taiwan, China, South Korea, and Japan, AT&S’s European capacity and emerging Southeast Asian facilities are diversifying the supply base.
• Process evolution. Semi-Additive Process (SAP) — mSAP’s more advanced cousin that eliminates the seed layer entirely — is under development for <15μm features, potentially bridging the gap between PCB and IC substrate manufacturing.

For designers and engineers working with HDI PCB manufacturers, understanding mSAP’s capabilities and limitations is becoming essential for optimizing next-generation designs.

What This Means for Your Next Project

Whether you’re designing compact automotive ADAS modules, high-density AI server boards, or next-generation consumer electronics, Atlas PCB’s engineering team stays ahead of industry developments to deliver optimized solutions. Contact us to discuss how these developments affect your PCB requirements.

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