PCB Copper Foil Types

The Role of Copper Foil in PCB Performance

Copper foil is the foundation of every PCB circuit — yet engineers often specify only the weight (thickness) while overlooking the foil type. This oversight can lead to:

• Unexpected insertion loss in high-speed channels
• Premature fatigue failure in flex circuits
• Impedance variation beyond tolerance
• Adhesion problems during fabrication

Two fundamentally different manufacturing processes produce copper foil for PCBs: electrodeposition (ED) and rolling + annealing (RA). Each creates distinct grain structures with dramatically different electrical, mechanical, and thermal properties.

This guide explains the engineering differences and helps you specify the right foil type for your application.

Electrodeposited (ED) Copper Foil

Manufacturing Process

ED foil is produced by electroplating copper from a copper sulfate solution onto a slowly rotating titanium drum:

1. Copper ions deposit on the drum cathode surface
2. The thin copper sheet is continuously peeled off as the drum rotates
3. The foil passes through treatment baths for surface roughening, barrier layer, and silane coupling agent

Key process characteristics:

• Deposition rate: 1-3 µm/minute
• Drum side (smooth): Rz 1-3 µm
• Matte/bath side (rough): Rz 3-8 µm (standard), 1.5-4 µm (HVLP/RTF)
• Thickness range: 5 µm (¼ oz) to 210 µm (6 oz)
• Production speed: 5-15 m/min

Grain Structure

ED foil has columnar grain structure — crystals grow perpendicular to the drum surface like tiny pillars. This creates:

• Anisotropic mechanical properties (strong in-plane, weak across grain boundaries)
• Natural surface roughness on the bath/matte side
• Grain boundaries aligned perpendicular to the foil surface — creating easy crack propagation paths during bending

Surface Treatment Options

The rougher treatments provide better adhesion (higher peel strength) at the cost of increased signal loss. This is the fundamental trade-off in high-speed PCB material selection.

ED Foil Applications

• Standard multilayer rigid PCBs (most of global PCB production)
• Power electronics (heavy copper 3-6 oz)
• Automotive rigid boards (cost-sensitive, high volume)
• Digital designs < 5 GHz where loss budget is comfortable
• Any application where the board won’t be flexed

Rolled Annealed (RA) Copper Foil

Manufacturing Process

RA foil starts with a thick copper ingot that undergoes multiple rolling passes followed by thermal annealing:

1. Cast copper ingot (200-300 mm thick)
2. Hot rolling to ~5 mm
3. Multiple cold rolling passes (reduction ratio 90-99%)
4. Intermediate annealing (400-600°C) to restore ductility
5. Final cold rolling to target thickness
6. Final annealing to achieve desired temper (soft, half-hard, etc.)
7. Surface treatment (minimal roughening needed due to natural smoothness)

Key process characteristics:

• Both surfaces equally smooth: Rz < 2 µm
• Grain structure: elongated, pancake-shaped, oriented parallel to the surface
• Superior purity control possible (99.99%+ Cu)
• Thickness range: 9 µm (⅓ oz) to 35 µm (1 oz) — thicker is possible but expensive

Grain Structure

RA foil has elongated horizontal grain structure — flattened by the rolling process and recrystallized by annealing into large, flat grains oriented parallel to the foil surface. This creates:

• Isotropic in-plane properties (similar strength in all directions parallel to surface)
• Excellent resistance to flex fatigue (cracks can’t easily propagate along the grain boundaries)
• Naturally smooth surfaces on both sides
• Higher ductility (elongation 15-25% vs 5-12% for ED)

RA Foil Variants

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Signal Loss: The Roughness-Frequency Relationship

Skin Effect and Surface Roughness

At high frequencies, current concentrates in a thin layer at the conductor surface (skin effect). The skin depth (δ) decreases with frequency:

$$\delta = \sqrt{\frac{\rho}{\pi f \mu_0}} = \frac{66.1}{\sqrt{f_{GHz}}} \quad \text{µm (for copper)}$$

Hammerstad-Jensen Roughness Model

The increase in conductor loss due to surface roughness is modeled by:

$$K_{SR} = 1 + \frac{2}{\pi} \arctan\left(1.4 \left(\frac{R_q}{\delta}\right)^2\right)$$

Where Rq is the RMS surface roughness (approximately Rz/4 for typical profiles).

Practical loss increase at 10 GHz:

• Standard ED (Rz = 6 µm): K_SR ≈ 1.95 (95% increase over smooth copper)
• HVLP ED (Rz = 2 µm): K_SR ≈ 1.55 (55% increase)
• RA foil (Rz = 1.2 µm): K_SR ≈ 1.32 (32% increase)
• Theoretical smooth: K_SR = 1.00 (baseline)

Insertion Loss Comparison (5-inch 50Ω trace, 10 GHz)

For 25+ Gbps designs, the difference between standard ED and RA foil can mean the difference between passing and failing channel compliance.

Flex Fatigue: Mechanical Performance

Failure Mechanism in ED vs RA

ED foil failure mode: Columnar grains create grain boundaries perpendicular to the surface. Under bending stress, cracks initiate at the rough surface and propagate straight down along the vertical grain boundaries — requiring minimal energy to traverse the full foil thickness.

RA foil failure mode: Elongated horizontal grains force any crack to repeatedly change direction, crossing grain boundaries at oblique angles. This crack-deflection mechanism absorbs far more energy, resulting in 10-20× greater fatigue life.

Flex Cycle Data (IPC-TM-650, Method 2.4.3)

For flex and rigid-flex PCB designs, RA foil is not optional — it’s the only technically viable choice for any zone that experiences repeated bending.

Static vs Dynamic Flex Applications

• Static flex (bent once during assembly, then stays): RA standard is sufficient
• Dynamic flex (continuous bending in service — laptop hinges, wearables): HA (hyper-annealed) foil required
• Rigid sections of rigid-flex: ED foil acceptable (cost optimization)

Cost and Availability

Price Comparison

The cost premium of RA foil is justified when:

1. Flex reliability requirements demand it (no alternative)
2. High-frequency loss savings eliminate the need for a more expensive laminate
3. The total board cost is dominated by other factors (complex stackup, fine features)

Major Foil Manufacturers

• Mitsui Mining & Smelting: MicroThin RA, TQ-VLP (ED)
• JX Nippon Mining: BHFX (RA), GTS-MP (HVLP ED)
• Fukuda Metal Foil: CF-T9 (RA), CF-H9M (HVLP ED)
• Circuit Foil Luxembourg: RTF-II (HVLP ED), STAR (RA)
• Nan Ya Plastics: Various ED profiles

Specification Guidelines for Engineers

When to Specify RA Foil

• All flex zone layers in flex/rigid-flex constructions
• RF/microwave circuits above 5 GHz on PTFE or LCP substrates
• 25+ Gbps SerDes channels where conductor loss budget is tight
• Wearable and implantable medical devices (dynamic flex + biocompatibility)

When ED (HVLP/RTF) is Sufficient

• Rigid-only boards at 5-25 GHz (good balance of cost vs performance)
• PCIe Gen5/Gen6 channels with adequate loss margin
• High-layer-count server boards where cost matters
• Automotive ADAS radar modules (28 GHz, but short trace lengths)

Stackup Notes

In your fabrication drawing, specify:

Layer 1 (Top):     ED HVLP, 1 oz (35 µm), Rz ≤ 2.5 µm
Layer 2 (GND):     ED Standard, ½ oz (18 µm)
...
Flex Layer 7:      RA, ½ oz (18 µm), Rz ≤ 1.5 µm
Flex Layer 8:      RA, ½ oz (18 µm), Rz ≤ 1.5 µm

Always specify both the foil type AND the maximum roughness requirement to avoid substitution.

Further Reading

• Copper Roughness and High-Speed Signal Loss
• Rigid-Flex PCB Design Guide
• RF PCB Material Selection
• High-Speed Material Dk/Df Comparison

Designing with RA or HVLP copper foil? AtlasPCB stocks leading RA foil brands and HVLP ED laminates for flex, rigid-flex, and high-frequency applications. Request a quote with your stackup requirements.